VHDL数字系统设计（英文版）

    书籍
    计算机书籍
　　 本书主要介绍数字系统设计的基本原理。VHDL是一种设计语言，这种设计语言允许设计人员先对基本的数字电路的特性和结构建模，然后再自动实现高级描述的电路结构。全书共分12章，主要讨论了电路设计自动工具的使用、CMOS和可编程逻辑技术，布尔代数的原理和组合逻辑设计。全书通过基本逻辑门模型引入了VHDL，强调了文档化代码的重要性，同时描述了各种建模技术，有限状态机的设计等。本书适合于学习数字电路课程的学生和相关工程技术人员。
　　

preface
1 introduttion
1.1 modern digital design
1.2 cmos technology
1.3 programmable logic
1.4 electrical propenies
1.5 summary
1.6 funher reading
exercises
2 combinational logic design
2.1 boolean algebra
2.2 logic gates
2.3 combinational logic design
2.4 timing
2.5 number codes
2.6 summary
2.7 funher reading
exercises
3 combinational logic using vhdl gate models
3.1 entities and architectures

　　 About this book
　　 There are probably tens, if not hundreds. of textbooks in print t about digital design. There are a large number of book about VHDL. Why then did I add to this abundance by writing yet anoaler textbook on digital design? As the tide suggests, this book combines the discipline of digital design wial a guide to dle use of VrmL. By doing this. I have attempted to create an approach that is distinct from eidler of the oaler types of book.
　　 The fact dlat I am trying to provide a different type of book should not be interpreted to mean that I am necessarily critical of everyaling that has gone before. There are a number of very good digital design textbooks, some of which are listed in the bibliography. Similarly. there are a number of excellent VHDL books. The majority of VHDL books, however, are aimed at practising engineers. This book is intended as a student textbook. Therefore, some features of VHDL are not described at all in this book. Equally, aspects of digital design are covered that would not be included in a typical VHDL book.
　　 Syllabuses for electrical, electronic and computer engineering degrees vary between countries and between universities or colleges. The material in this book has been developed over a number of years for second and third year undergraduates and for postgraduate students. It is assumed that students will be familiar with the principles of Boolean algebra and with combinational logic design. At the University of Southampton, the first year undergraduate syllabus also includes introductions to synchronous sequential design and to programmable logic. This book therefore builds upon these foundations. It has often been assumed that topics such as VHDL are too specialized for second year teaching and are best lefi to final year or postgraduate comses. There are several good reasons why VHDL should be introduced earlier into the cuoiculum. With increasing integrated circuit complexity, there is a need from industry for graduates with knowledge of VHDL and the associated design tools. If left to the final year, there is little or no time for the student to apply such knowledge in project work. Second, conversations with colleagues from many countries suggest that today's students are opting for computer science or compnter engineering courses in preference to elecuical or elecuonic engineering. VHDL offers a means to interest computing-oriented students in hardware design. Finally, simulation and syndlesis tools are now mature and available relatively cheaply to educational establishments on PC platforms.
　　 Structure of this book
　　 Chapter 1 introduces the ideas behind this book. namely the use of elecffonic design automation tools and CMOS and programmable logic technology. We also consider some engineering problems. sncb as noise margins and fan-out. In Chapter 2. the principles of Boolean algebra and of combinational logic design are reviewed. The important matter of timing and the associated problem of hazards are discussed. Some basic techniques for representing data are discussed.
　　 VHDL is inuoduced in Chapter 3 through basic logic gate models. The importance of documented code is emphasized. We show how to construct netlists of basic gates and how to model delays through gates. We also discuss parameterized models and constant and unconnected inputs and outputs. The idea of osing VHDL to verify VHDL models by using testbenches is inuoduced. Finally, we briefly introduce the concept of configurations.
　　 In Chapter 4. a variety of modelling techniques are described. Combinational building blocks, buffers, decoders, encoders, multiplexers. adders and parity checkers are modelled using a range of concunent and sequential VHDL coding constructs. The VHDL models of hardware introduced in this chapter and in Chapters 5, 6 and 7 are, in principle, synOlesizable, although discussion of exactly what is suppoHed is defemed until Chapter 9. In addition. the IEEE dependency notation is introduced.
　　 Chapter 5 is probably ale most impoHant chapter of dle book and discnsses what might be considered ale cornerstone of digital design: the design of finite state machines. The ASM chart notation is used. The design process from ASM chart to D flip-flops and next state and output logic is described. VHDL models of state machines are introduced.
　　 Chapter 6 inaoduces various sequential building blocks: latches, Hip-flops. registers. counters, memory and a sequential multiplier. The same style as Chapter 4 is used, with IEEE dependency notation and the introduction of VHDL coding constructs.
　　 In Chapter 7 the concepts of the previous three chapters are combined. The ASM chart notation is extended to include coupled state machines and registered outputs, and hence to datapath-controller panitioning. From this. we explain the idea of instructions in hardware terms and go on to model a very basic microprocessor in VHDL. This provides a vehicle to introduce VHDL subroutines and packages.
　　 VHDL remains primarily a modelling language. Chapter 8 describes the operation of a VHDL simulator. The idea of event-driven simulation is first explained and the specific features of a VHDL simulator are then discussed. Although the entire VHDL language can be simulated, some constructs simulate more efficiently than others; therefore techniques for writing models that are more efficient are discussed. File operations are also discussed in this chapter because such functionality is only appropriate to simulation models.
　　 The other, increasingly important. role of VHDL is as a language for describing synthesis models. as discussed in Chapter 9. The dominant type of synthesis tool available today is for RTL synthesis. Sach tools can infer the existence of Hip-80ps and latches kom a VHDL model. These consffucts are described. Conversely, flip-flops can be created in error if the description is poorly written, and common pitfalls are described. The synthesis process can be controlled by consffaints. Because these constraints are outside the language, they are discnssed in cgeneral terms. Suitable constructs for FPGA synthesis are discussed. FinaUy, behavioural synthesis. which promises to become an imponant design technology. is briefly examined.
　　 Chapters 1O and 11 are devoted to the topics of testing and design for test. This area has often been neglected, but is now recognized as being an important part of the design process. In Chapter 1O the idea of fault modelling is introdaced. This is followed by test generation methods. The efficacy of a test can be determined by fault simulation. At the time of writing, there are no commercial VHDL-based fault simulators available. The final section of this chapter shows how fanlt modelling and fault simulation can be performed using a standard VHDL simulator. The VHDL code also introduces constructs such as pointers and shared (global) variables.
　　 In Chapter 11. three important design-for-test principles are described: scan path, built-in self-test (BIST) and boondary scan. This has always been a very dry subject, but a VHDL simulator can be used. for example. to show how a BIST structure can generate different signatures for fault-free and faulty circuits. Boundary scan uses a subset of VHDL to describe the test structures used on a chip, and an example is given.
　　 In the final chapter, we use VHDL as a tool for exploring anomalous behaviour in asynchronous sequential circuits. Although the predominant design style is cuaently synchronous, it is likely that digital systems will increasingly consist of synchronous circuits communicating asynchronously with each other. We introduce the concept of the fundamental mode and show how to analyze and design asynchronous circuits. We use VHDL simulations to illasuate the problems of hazards, races and setup and hold time violations. We also discuss the problem of metastability.
　　 Three appendices are incladed. The first appendix lists the various VHDL-related standards and speculates on the filture development of VHDL. The second appendix briefiy describes the Verilog hardware description language. Verilog is the major altemative to VHDL and it is likely that designers will have to be familiar with both.
　　 The third appendix covers shared variables. At the end of each chapter a number of exercises have been included. These exercises are almost secondary to the implicit instruction in each chapter to simulate and, where appropriate, synthesize each VHDL example. To perform these simulation and synthesis tasks. the reader will have to write his or her own testbenches and constraints files. The examples are available on the World Wide Web at the address given in the next section.
　　 How to use this book
　　 Obviously, this book can be used in a number of different ways, depending on the level of the course. At the University of Southampton. I am using the material as follows.