Preface
Chapter 1 Introduction
1.1 Ideal and Typical Power Switching Waveforms
1.2 Ideal and Typical Power Device Characteristics
1.3 Unipolar Power Devices
1.4 Bipolar Power Devices
1.5 MOS-Bipolar Power Devices
1.6 Ideal Drift Region for Unipolar Power Devices
1.7 Charge-Coupled Structures：Ideal Specific On-Resistance
1.8 Summary
Problems
References
Chapter 2 Material Properties and Transport Physics
2.1 Fundamental Properties
2.1.1 Intrinsic Carrier Concentration
2.1.2 Bandgap Narrowing
2.1.3 Built-in Potential
2.1.4 Zero-Bias Depletion Width
2.1.5 Impact Ionization Coefficients
2.1.6 Carrier Mobility
2.2 Resistivity
2.2.1 Intrinsic Resistivity
2.2.2 Extrinsic Resistivity
2.2.3 Neutron Transmutation Doping
2.3 Recombination Lifetime
2.3.1 Shockley-Read-Hall Recombination
2.3.2 Low-Level Lifetime
2.3.3 Space-Charge Generation Lifetime
2.3.4 Recombination Level Optimization
2.3.5 Lifetime Control
2.3.6 Auger Recombination
2.4 Ohmic Contacts
2.5 Summary
Problems
References
Chapter 3 Breakdown Voltage
3.1 Avalanche Breakdown
3.1.1 Power Law Approximations for the Impact Ionization Coefficients
3.1.2 Multiplication Coefficient
3.2 Abrupt One-Dimensional Diode
3.3 Ideal Specific On-Resistance
3.4 Abrupt Punch-Through Diode
3.5 Linearly Graded Junction Diode
3.6 Edge Terminations
3.6.1 Planar Junction Termination
3.6.2 Planar Junction with Floating Field Ring
3.6.3 Planar Junction with Multiple Floating Field Rings
3.6.4 Planar Junction with Field Plate
3.6.5 Planar Junction with Field Plates and Field Rings
3.6.6 Bevel Edge Terminations
3.6.7 Etch Terminations
3.6.8 Junction Termination Extension
3.7 Open-Base Transistor Breakdown
3.7.1 Composite Bevel Termination
3.7.2 Double-Positive Bevel Termination
3.8 Surface Passivation
3.9 Summary
Problems
References
Chapter 4 Schottky Rectifiers
4.1 Power Schottky Rectifier Structure
4.2 Metal-Semiconductor Contact
4.3 Forward Conduction
4.4 Reverse Blocking
4.4.1 Leakage Current
4.4.2 Schottky Barrier Lowering
4.4.3 Prebreakdown Avalanche Multiplication
4.4.4 Silicon Carbide Rectifiers
4.5 Device Capacitance
4.6 Thermal Considerations
4.7 Fundamental Tradeoff Analysis
4.8 Device Technology
4.9 Barrier Height Adjustment
4.10 Edge Terminations
4.11 Summary
Problems
References
Chapter 5 P-i-N Rectifiers
5.1 One-Dimensional Structure
5.1.1 Recombination Current
5.1.2 Low-Level Injection Current
5.1.3 High-Level Injection Current
5.1.4 Injection into the End Regions
5.1.5 Carrier-Carrier Scattering Effect
5.1.6 Auger Recombination Effect
5.1.7 Forward Conduction Characteristics
5.2 Silicon Carbide P-i-N Rectifiers
5.3 Reverse Blocking
5.4 Switching Performance
5.4.1 Forward Recovery
5.4.2 Reverse Recovery
5.5 P-i-N Rectifier Structure with Buffer Layer
5.6 Nonpunch-Through P-i-N Rectifier Structure
5.7 P-i-N Rectifier Tradeoff Curves
5.8 Summary
Problems
References
Chapter 6 Power MOSFETs
6.1 Ideal Specific On-Resistance
6.2 Device Cell Structure and Operation
6.2.1 The V-MOSFET Structure
6.2.2 The VD-MOSFET Structure
6.2.3 The U-MOSFET Structure
6.3 Basic Device Characteristics
6.4 Blocking Voltage
6.4.1 Impact of Edge Termination
6.4.2 Impact of Graded Doping Profile
6.4.3 Impact of Parasitic Bipolar Transistor
6.4.4 Impact of Cell Pitch
6.4.5 Impact of Gate Shape
6.4.6 Impact of Cell Surface Topology
6.5 Forward Conduction Characteristics
6.5.1 MOS Interface Physics
6.5.2 MOS Surface Charge Analysis
6.5.3 Maximum Depletion Width
6.5.4 Threshold Voltage
6.5.5 Channel Resistance
6.6 Power VD-MOSFET On-Resistance
6.6.1 Source Contact Resistance
6.6.2 Source Region Resistance
6.6.3 Channel Resistance
6.6.4 Accumulation Resistance
6.6.5 JFET Resistance
6.6.6 Drift Region Resistance
6.6.7 N+ Substrate Resistance
6.6.8 Drain Contact Resistance
6.6.9 Total On-Resistance
6.7 Power VD-MOSFET Cell Optimization
6.7.1 Optimization of Gate Electrode Width
6.7.2 Impact of Breakdown Voltage
6.7.3 Impact of Design Rules
6.7.4 Impact of Cell Topology
6.8 Power U-MOSFET On-Resistance
6.8.1 Source Contact Resistance
6.8.2 Source Region Resistance
6.8.3 Channel Resistance
6.8.4 Accumulation Resistance
6.8.5 Drift Region Resistance
6.8.6 N+Substrate Resistance
6.8.7 Drain Contact Resistance
6.8.8 Total On-Resistance
6.9 Power U-MOSFET Cell Optimization
6.9.1 Orthogonal P-Base Contact Structure
6.9.2 Impact of Breakdown Voltage
6.9.3 Ruggedness Improvement
6.10 Square-Law Transfer Characteristics
6.11 Superlinear Transfer Characteristics
6.12 Output Characteristics
6.13 Device Capacitances
6.13.1 Basic MOS Capacitance
6.13.2 Power VD-MOSFET Structure Capacitances
6.13.3 Power U-MOSFET Structure Capacitances
6.13.4 Equivalent Circuit
6.14 Gate Charge
6.14.1 Charge Extraction
6.14.2 Voltage and Current Dependence
6.14.3 VD-MOSFET vs.U-MOSFET Structure
6.14.4 impact of VD-MOSFET and U-MOSFET Cell Pitch
6.15 Optimization for High Frequency Operation
6.15.1 Input Switching Power Loss
6.15.2 Output Switching Power Loss
6.15.3 Gate Propagation Delay
6.16 Switching Characteristics
6.16.1 Turn-On Transient
6.16.2 Turn-Off Transient
6.16.3 Switching Power Losses
6.16.4 [dV/dt]Capability
6.17 Safe Operating Area
6.17.1 Bipolar Second Breakdown
6.17.2 MOS Second Breakdown
6.18 Integral Body Diode
6.18.1 Reverse Recovery Enhancement
6.18.2 Impact of Parasitic Bipolar Transistor
6.19 High-Temperature Characteristics
6.19.1 Threshold Voltage
6.19.2 On-Resistance
6.19.3 Saturation Transeonductance
6.20 Complementary Devices
6.20.1 The p-Channel Structure
6.20.2 On-Resistance
6.20.3 Deep-Trench Structure
6.21 Silicon Power MOSFET Process Technology
6.21.1 Planar VD-MOSFET Process
6.21.2 Trench U-MOSFET Process
6.22 Silicon Carbide Devices
6.22.1 The Baliga-Pair Configuration
6.22.2 Planar Power MOSFET Structure
6.22.3 Shielded Planar Power MOSFET Structures
6.22.4 Shielded Trench-Gate Power MOSFET Structure
6.23 Summary
Problems
References
……
Chapter 7 Bipolar Junction Transistors
Chapter 8 Thyristors
Chapter 9 Insulated Gate Bipolar Transistors
Chapter 10 Synopsis
